MICROELECTRONIC SYSTEMS NEWS

FILENUMBER: 1013 BEGIN_KEYWORDS SOC CURRICULA CONSORTIA END_KEYWORDS DATE: July 2001 TITLE: SOC CURRICULA AND CONSORTIA
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TITLE: SOC CURRICULA AND CONSORTIA

Several new education programs have been initiated  in  the  last
few   years   to   prepare   graduate  students  with  meaningful
experiences in SoC design.

In Pennsylvania, the Pittsburgh Digital Greenhouse is a consortia
formed  by  Carnegie  Mellon  University,  Penn.  State  and  the
University of Pittsburgh to offer a broad SoC  experience.   Each
graduate  student receives the M.S. from his/her home institution
but can enroll in courses offerred by one of  the  other  schools
and  thereby  obtain a SoC certificate. The program will have its
initial offering this Fall.  A description of the skills required
for SoC design and the various course offerings are given at: 
DIGITALGREENHOUSE

In Sweden, a SoC design cluster has  been  formed  to  unify  the
efforts  of  universities,  research institutes and industry. The
initiative has received a government grant of 50M Euros, of which
13  are  reserved  for  research  and education. Lund University,
Linkoping University and the Royal Institute  of  Technology  are
participating  in  developing  a MS program which  consists of 40
credit units of courses (9 months)   and   20   credit  units  of
thesis  work (6 months).  For  additional  information,   access:
SOCWARE.

In Scotland, a system-level  integration  MSc  program  has  been
in  progress  for a couple of years.   The  Alba  Centre combines
the resources of four universities into a special  program  which
is  focused  on  IP  authoring and integration for system-on-chip
designs.   Concurrently,  an  ARM platform  is   being  developed
for  education and research purposes onto which  student  designs
can  be  integrated.   Experiences in courses already taught were
described  by  Patrick  Lysaght  at the 
2001 Microelectronic Systems Education Conference.
His  presentation  slides  are  on  the  conference website.  His
course specifically addressed  the  task  of  authoring  soft  IP
blocks  and using OpenMore for rating them.  He determined that a
workable approach was to have  the  students  evaluate  and  then
improve  existing  IP  (e.g.,  VHDL description of the Sparc CPU:
LEON).   For  more  information  about   the
consortia, access: SLI.

In Canada, the government has pledged 25M dollars over  the  next
five  years  to  build  an  infrastructure  for  SoC research and
education  at  Canadian   universities.    The  effort  is  being
coordinated  by  the  Canadian  Microelectronics  Center (CMC) to
provide SoC-based design flows, silicon   intellectual   property
and   three   SoC   platforms   built   for  research purposes: a
high-performance   network-processing   platform,   a   low-power
Bluetooth RF platform and an FPGA prototyping platform.  CMC does
not intend to redistribute commercial IP but  will  provide  such
cores  as  processors, memories and A/D converters as part of its
SoC research platforms. Moreover, the research network  will  set
up   a  secure   IP   management   system   to   facilitate   the
exchange  of university-developed IP. For additional information,
access: CMC.


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