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TITLE: WEB-BASED SIMULATORS FOR COMPUTER ARITHMETIC
Several web sites have simulators for computer arithmetic. These
are particularly useful for students to understand the specifics
of various implementations.
Prof. Koren of the Univ. of Massachusetts created a simulator in
conjunction with his textbook entitled "Computer Arithmetic
Algorithms". Functions include: multiplication, division,
square root and addition. For additional details, access: UMASS
A comprehensive library of arithmetic units written in
synthesizable VHDL code has been developed by Prof. Zimmermann of
ETH Zurich. The library contains components for a variety of
arithmetic operations including parallel-prefix adders. For
additional details, access: ETHZ
The detailed operations of a variety of adders, multipliers, etc.
are given (in French only) in a set of exercises developed by
Prof. Guyot of TIMA. For additional details, access: TIMA
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