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TITLE: MATLAB-TO-FPGA SYNTHESIS FOR DSP
AccelFPGA is a high-level synthesis tool that directly
synthesizes the MATLAB design language and Simulink graphical
netlists into RTL models with simulation testbenches. This
designer productivity tool is based on a research project
conducted at Northwestern University under sponsorship by DARPA.
Armed with the knowledge of the target FPGA device's internal
execution resources, routing architecture and physical design,
the AccelFPGA compiler produces optimized RTL models that can
then be synthesized by Synopsys, Mentor Graphics or Synplicity
into Xilinx, Altera or QuickLogic FPGAs.
For additional information, access: AccelChip
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FILENUMBER: 1053
BEGIN_KEYWORDS
MATLAB-TO-FPGA SYNTHESIS DSP
END_KEYWORDS
DATE: May 2002
TITLE: MATLAB-TO-FPGA SYNTHESIS FOR DSP
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