=================================================================
TITLE: Benchmarking Future Deep-Submicron Circuits
The Semiconductor Research Corp. has helped sponsor the Berkeley
Predictive Technology Model project which provides SPICE models
for next generation CMOS processes. The models, which are
customizable and reasonably accurate, accommodate a set of
typical BSIM parameters for CMOS and a simple analytical approach
for interconnect capacitance and inductance. The project enables
circuit design and research to start even before the advanced
CMOS process is fully developed. Default values which represent
a typical technology node are provided. The SPICE model cards
are available for the following feature sizes: 180 nm, 130 nm,
100 nm, 70 nm, 65 nm and 45 nm.
To download these and the model itself at no charge, access: PTM
=================================================================
FILENUMBER: 1116
BEGIN_KEYWORDS
BENCHMARKING FUTURE DEEP-SUBMICRON CIRCUITS
END_KEYWORDS
DATE: May 2003
TITLE: Benchmarking Future Deep-Submicron Circuits
Return to MSN Home Page