=================================================================
TITLE: Free VHDL2Verilog Translator
A subset of VHDL can be translated into Verilog using software
that is available at no charge. The tool has been used
successfully to translate VHDL into Verilog for JPEG, triple DES,
AES and MPEG-4 cores offered by Ocean Logic. The translator does
not support VHDL packages and only supports numerical types. It
produces synthesizable code but not testbenches.
For additional information, access:
VHDL2Verilog
=================================================================
FILENUMBER: 1127
BEGIN_KEYWORDS
VHDL2Verilog Translator
END_KEYWORDS
DATE: July 2003
TITLE: Free VHDL2Verilog Translator
Return to MSN Home Page