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TITLE: Starter's Guide to Verilog 2001
"Starter's Guide to Verilog 2001" (ISBN: 0-13-141556-5) by
Prof. Michael D. Ciletti, Univ. of Colorado, Colorado Springs.
The popular Verilog hardware description language underwent its
first revision in 2000, and emerged as IEEE Standard 1364-2001,
know as Verilog-2001, with significant changes aimed at improving
the utility and clarity of the language. The language was
strengthened by the addition of enhancements supporting higher
level modeling and abstract modeling, while maintaining backward
compatibility with IEEE Standard 1364-1995.
This text presents a selected set of those changes, with several
examples showing how the reader can develop models that exploit
the key features of Verilog-2001. An appendix includes the
complete formal syntax of IEEE Standard 1364-2001, which also
encompasses IEEE Standard 1364-1995.
Suitable for self-study, the book is intended to serve as a
companion text for students taking an introductory course in
digital logic design, and for circuit designers wishing to
acquire a basic background in Verilog 2001.
Table of Contents
1. Introduction to Digital Design Methodology
2. Basic Concepts: Primitives, Data Types, and Operators in Verilog
3. Modeling Structure with Verilog
4. Simulating Hardware with Verilog Models
5. Modeling Behavior with Verilog
6. Modeling Finite-State Machines and datapath Controllers with Verilog
Appendix A: Verilog 2001 Keywords
Appendix B: Verilog Primitives
Appendix C: Verilog 2001 Language Syntax
Appendix D: System Tasks and Functions
Appendix E: Compiler Directives
appendix F: Websites
To order, access: Prentice-Hall
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FILENUMBER: 1140
BEGIN_KEYWORDS
Text Starter's Guide Verilog 2001
END_KEYWORDS
DATE: October 2003
TITLE: Starter's Guide to Verilog 2001
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