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TITLE: Reconfigurable Platform Design
QuickSilver Technology offers a development system that enables a
designer to implement his own reconfigurable system-on-chip. The
development system consists of tools and algorithmic engines
which the user can configure using a version of the C language.
Instead of the traditional approach of hardware/software co-
design, the methodology enables both the chip design and its
programming to be performed in a single language. This unified
programming environment operates at a high-level of abstraction
that hides hardware and task scheduling from a user. The code is
executed through an array of hardware nodes, each containing
specific algorithmic engines in a pipelined communications flow.
These engines include a CPU, an array of arithmetic logic units
for bit manipulation, a multiplier and a memory controller for
off-chip memory. As many as 32 of these nodes can be placed on a
130-nm CMOS die.
For additional information, access: QuickSilver
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FILENUMBER: 1155
BEGIN_KEYWORDS
Reconfigurable Platform Design QuickSilver
END_KEYWORDS
DATE: February 2004
TITLE: Reconfigurable Platform Design
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