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TITLE: Dynamically Reconfigurable Hardware
Field-programmable gate arrays are frequently selected for
applications because they provide direct execution of parallel
tasks 100x faster than conventional CPUs. These devices tend to
use less power than CPUs since data movement is minimized.
Often these devices are less expensive than ASICs for
applications requiring less than 200,000 copies. Another
valuable feature of these devices is that both their logic and
interconnect resources are generally reconfigurable. Commercial
devices are now available that permit this reconfiguration or
"context switching" to occur quickly. A survey of these is given
below.
A. DAPDNA by IP Flex, Inc.
IP Flex, Inc. is a Japanese company which has developed DAPDNA
(Digital Application Processor/Distributed Network Architecture)
that is a dynamically reconfigurable processor with dual-core
CPUs. Each CPU is a RISC core (developed by IP Flex) and is
paired with the DNA, a dynamically reconfigurable two-dimensional
processing element matrix. The DAP RISC core controls the
processor's dynamic reconfiguration, while portions of an
application that require high-speed data processing are handled
by an array of 376 Processing Elements (PEs). The PE Matrix is
comprised of computation units, memory, synchronizers, and
counters and can be reconfigured freely into the structure that
is most optimal for meeting the needs of the application. IP
Flex's design tool suite supports application development by
integrating advanced C-based application designs into hardware.
The DAPDNA product line is well suited for the following
application areas:
-Image inspection systems
-Medical equipment
-Network security
-Genomics, Aerospace research
-Wireless communication
For additional information, access: IP Flex
B. Multi-Standard Video Codecs by PACT XPP
PACT XPP Technologies is a German company that has developed
reconfigurable parallel processing solutions for the design of
multi-standard video codecs. Thus, evolving video standards can
be supported within a single product that is fully programmable.
The smart media product family, SMeXXP, is an integrated hardware
/ software package that includes:
* IP (intellectual property) blocks for a scalable processing
array
* Building blocks for integration into Systems-on-Chip (SoC)
* Optimized software video codecs utilizing the XPP array for
coprocessing
* Cycle accurate simulation models
* C-API for integration into SoC operating systems
For additional information, access: PACT XPP
C. DRP by NEC Electronics
NEC Electronics has developed the Dynamically Reconfigurable
Processor (DRP) that uses an original architecture combining
software flexibility and hardware capable of high-speed
processing. The DRP is designed to serve the following types of
customers.
* Customers who are starting design work without clearly
defined specifications
* Customers who want to change or add product functions after
the product has shipped
* Customers who want a product with a long service life and
with modifiable functions
* Customers who want a single chip that can be used with
several systems
* Customers who want a chip that can handle a large
processing load without relying on hardware-based processing.
The DRP is a type of IP (intellectual property) core that can be
used to implement programmable, high-performance processing that
formerly required dependence on dedicated hardware. The DRP
offers a combination of reconfigurable circuitry, powerful
processing, and development of C language-based applications.
The ability to reconfigure processing circuits dynamically means
that applications can be dynamically revised as well. For
example, the DRP enables switching among different encryption
algorithms, since the circuit can be dynamically reconfigured
according to the conditions under which input data is encrypted.
Simultaneous parallel operation of the processing elements (PEs)
that comprise a DRP enables the DRP to meet the high-performance
processing level of dedicated hardware. During such processing,
dynamic switching among the optimum circuitry makes for higher
computational efficiency relative to the chip area, which works
to raise overall processing performance. The DRP also has
shorter wiring length than conventional types of architecture
such as in FPGAs that deploy all connected processing blocks
evenly, and this helps to accelerate processing. The DRP
development environment differs from the compilation environment
used for ordinary microprocessors in that it employs a
development tool based on the ASIC development environment which
supports C language programming. NEC Electronics has used the
tool successfully in ASIC development, and by putting it to work
for DRP development as well, the company is providing support for
automatic synthesis of various operations and comprehensive
designs featuring dynamically reconfigurable control. This
approach also helps to lighten the workload for designers since
it enables re-use of various software assets.
For additional information, access: NEC DRP
D. D-Fabrix by Elixent
Elixent is a U.K. company that offers reconfigurable IP
(intellectual property) that provides users with the ability to
change the function of a chip even when in use. D-Fabrix, the
company's patented reconfigurable algorithm processing (RAP)
technology, provides ASIC designers with a flexible alternative
to fixed function chips but without consuming the level of power
normally associated with programmable technologies. This
combination is key to the future of custom chips. With the
growing convergence of consumer electronic devices, RAP allows
multiple applications such as music players, PDA functions, video
and still cameras to be realized on the same chip. The D-Fabrix
architecture includes routing and switching resources and extra
support for bit-level operations. Enhanced performance density is
achieved along with lower power operation in many mobile
multimedia and communications applications.
For additional information, access: Elixent
E. Software-Configurable Processors by Stretch, Inc.
Stretch, Inc. is a fabless semiconductor company in California
that provides software-configurable processors for the compute-
intensive applications. Standard C/C++ programming tools enable
the automatic configuration of their off-the-shelf processors to
achieve extraordinary performance, easy and rapid development,
and significant cost savings. The product is flexible enough to
address diverse market applications including consumer, telecom,
networking, video, and medical applications and can support
evolving standards such as H.264 video encoding and 802.16-2004
wireless communication. Stretch has added its own technology to
a core chip design that it licensed from Tensilica. The Stretch
S5000 processor and the accompanying development tools move
software "hot spots" (the sequences of operations that are
executed many times) into exceptionally fast custom instructions.
This transformation is easy to perform yet tens to hundreds of
instructions on other processors may become just a single
instruction on the Stretch processor.
For additional information, access: Stretch
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FILENUMBER: 1240
BEGIN_KEYWORDS
Dynamically Reconfigurable Hardware
END_KEYWORDS
DATE: December 2005
TITLE: Dynamically Reconfigurable Hardware
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