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TITLE: System-on-Chip Design Course at MIT
Professors Arvind and Asanovic of MIT offer a graduate course on
SoC design that is intended to teach new methodologies for
designing multi-million-gate CMOS VLSI chips using high-level
synthesis tools in conjunction with standard commercial
electronic design automation tools. The emphasis is on modular
and robust designs, reusable modules, correctness by
construction, architectural exploration, and meeting the area,
timing, and power constraints within standard cell and FPGA
frameworks. The course relies heavily on the use of electronic
system level synthesis software developed by Bluespec.
Course materials are freely accessible to anyone via the OpenCourseWare
project. Educators, self-learners, and students around the world
may access the material for the SoC course (EECS 6.884) or for
more than 1000 other courses for self-study.
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