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TITLE: Hardware Design Using Ruby and Python
There are open source and cross platform applications available
for both Ruby and Python that allow them to be used as Hardware
Description Languages (HDLs). Both are high-level, object
oriented, open source, and relatively easy to learn and read.
MyHdl is a software package that enables the modeling of hardware
in Python. It also allows a user to create Python test benches
for verification. A built-in simulator that supports VCD trace
file generation is integrated into MyHdl. Conversion of Python
code to synthesizable Verilog RTL is supported by a built-in
function. Conversion to VHDL is currently under development.
RHDL (Ruby Hardware Description Language) enables hardware
modeling in Ruby. It also supports verification with Ruby coded
test benches and a built-in simulation capability. However, it
does not yet support translation of Ruby code to Verilog or VHDL.
For more information, access: MyHDL
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FILENUMBER: 1252
BEGIN_KEYWORDS
Hardware Design Ruby Python
END_KEYWORDS
DATE: March 2006
TITLE: Hardware Design Using Ruby and Python
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