=================================================================
TITLE: Xilinx Targets Electronic System Level Design
Press Release
Xilinx, Inc. has launched the ESL Initiative -- a multi-faceted
program aimed at making electronic system level (ESL) design
methodologies and tools more accessible to programmable system
designers. The initiative expands collaboration across the ESL
supply chain to better integrate and optimize ESL tool flows for
both hardware designers and software programmers targeting Xilinx
FPGAs. Initial participants include: Bluespec Inc.; Celoxica;
CriticalBlue; Impulse Accelerated Technologies, Inc.; Mitrionics,
Inc.; Nallatech; Poseidon Design Systems, Inc.; SystemCrafter;
and Teja Technologies.
The ESL Initiative underscores the commitment by Xilinx and ESL
tool providers to drive technological innovation and development
of practical solutions that deliver on the full potential of this
high-level design methodology. The initiative has identified four
key areas of focus:
1. Improve ease of use to further simplify and abstract the
details associated with FPGA design.
2. Optimize support for Xilinx embedded PowerPC and MicroBlaze
processor solutions.
3. Improve the quality of results with high level language (HLL)
synthesis tools.
4. Establish common standards for FPGA ESL tool interoperability.
Technical collaboration will be backed by cooperative marketing
and educational programs to evangelize and promote the
capabilities, strengths and benefits of FPGA ESL solutions. As
part of that effort, Xilinx has launched the FPGA industry's
first ESL knowledge center and user blog. The site organizes
information on tools, design flows and applications, including
details on how designers can get started with an ESL product
evaluation. The goal is to empower the user community to make
informed decisions about ESL methodologies and solutions based
on their specific requirements.
ESL is an emerging design methodology that allows designers to
work at higher levels of abstraction than typically supported by
register transfer level (RTL) and gate level hardware
descriptions. Its growth has been driven by the continuing
complexity of IC design, including the use of third-party
intellectual property (IP) blocks and embedded cores, which has
made RTL and gate-level methods less efficient. The proliferation
of FPGA-based ESL tools and methodologies will make it easier for
designers to leverage programmable devices for critical system
applications such as algorithm acceleration, high performance
computing, high-speed packet processing, and rapid prototyping.
Many applications targeted for high-end FPGAs are initially
captured algorithmically in HLLs such as C or MATLAB. This has
led to growing interest by the FPGA user community in tools that
can provide an implementation path directly from HLLs to
hardware. ESL methodologies hold the promise of streamlining the
design approach by accepting designs written in C or MATLAB
languages and implementing the function straight into hardware.
Designers can also leverage ESL to optimize performance by
exporting compute intensive "bottleneck" functions into an FPGA
coprocessor implemented in programmable hardware.
=================================================================