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TITLE: Merging and Upgrading VHDL Standards
VHDL, the hardware description language for digital circuit
design, was originally created in 1987, significantly upgraded
in 1995, and underwent minor changes in 2002. With the
emergence of SystemC and SystemVerilog, VHDL standard IEEE Std
1076-2002 has started showing signs of aging, triggering the
largest and probably most important overhaul of the language to
date. A group of experts from industry, sponsored by the
Accellera organization (VHDL Technical Committee) has focused on
addressing existing issues in VHDL and adding important, new
features to the language. A complete 2006 release of the
Accellera Standard VHDL Language Reference Manual is planned
for DAC in July 2006.
To unify multiple standards branching from the original standard,
the new version of the language merges IEEE Std 1164-1993
(dealing with standard logic types), IEEE Std 1076.2-1996
(defining MATH_REAL and MATH_COMPLEX packages) and IEEE Std
1076.3-1997 (introducing NUMERIC_STD and NUMERIC_BIT packages)
with the core language standard.
Synthesizable packages supporting fixed-point arithmetic are one
of the new elements of the language. With all important packages
in one standard, existing operators can be unified (e.g. shift
operators) and new operators can be added (e.g. unary reduction
operators). VHPI (VHDL procedural interface) between VHDL and
C/C++ code is introduced as part of the new standard. A minimal
subset of the Property Specification Language (PSL) is included
to enhance assertions support. Support for Intellectual Property
(IP) encryption/decryption is added.
For more information, access: VHDL
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FILENUMBER: 1268
BEGIN_KEYWORDS
Merging Upgrading VHDL Standards
END_KEYWORDS
DATE: June 2006
TITLE: Merging and Upgrading VHDL Standards
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