MICROELECTRONIC SYSTEMS NEWS



FILENUMBER: 453
BEGIN_KEYWORDS
C++ FPGA Compiler
END_KEYWORDS
DATE: april 1995
TITLE: C++ to FPGA Compiler


C++ to FPGA Compiler

(Contributed by Christian Iseli of EPFL, Lausanne)

A C++ to netlist compiler has been developed.
The targeted hardware is mainly FPGA chips.

At the current time, the compiler:
  - is written in C++
  - can be compiled by g++ 2.6.3
  - needs the LEDA 3.1 library (which is available by anonymous ftp)
  - will directly generate ViewLogic WIR files and the associated symbols

The target (FPGA) architecture is described directly in the source
code, preferably in an included file. Thus it should be extremely easy
to generate netlists for different FPGA architectures. A partial
description of the XC4000 family is provided in the sources.

This is still beta quality code. The documentation is very sparse.

To obtain the code, 

   TAR.GZ

then look at the README file for terse explanations on how to build.

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