MICROELECTRONIC SYSTEMS NEWS



FILENUMBER: 454
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Texas Instruments FPGAs Universities
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DATE: april 1995
TITLE: Texas Instruments FPGAs in Universities


Texas Instruments FPGAs in Universities

(Contributed by Jeffrey Gueller of Texas Instruments)
 
     Texas Instruments  (TI) FPGAs continue to be used in leading edge 
	 research projects
     through our university program.  Dr. Reza Hashemian's, Associate
     Professor at Northern Illinois University, research into the
     area of active periodic noise cancellation using a TPC1240 will
     appear in an upcoming issue of EDN.  The FPGA design for noise
     cancellation consists of three major functions:
     adder/subtractor, storage space and control unit.  The
     adder/subtractor calculates the delta between the noise that has
     been heard and what is currently being heard, the storage space
     stores the old noise and the control block, or finite state
     machine, synchronizes system operation.
 
     At Purdue University Dr. Hank Dietz is using TIs TPC1280 device
     in a parallel computing application called a PAPERS, (Purdue's
     Adapter for Parallel Execution and Rapid Synchronization.
     Although traditional computer networks (Ethernet, FDDI, HiPPI,
     ATM, etc.) can provide good communication bandwidth for
     transmission of relatively large messages, effective use of a
     cluster of workstations or personal computers as a parallel
     computer depends on low-latency barrier synchronization and
     fine-grain aggregate communication operations.  PAPERS supports
     these operations by connecting each workstation to a dedicated
     barrier processor that interacts with the other barrier
     processors to form a highly specialized parallel engine for
     synchronization and aggregate communication.  TI FPGAs allow
     multiple custom barrier processors to be implemented per chip,
     and the FPGA easily conforms to a variety of low-latency
     computer interfaces.  Combining this hardware with a carefully
     designed set of library routines yields barrier synchronization
     and aggregate communication that is at least a factor of
     2,000-10,000x faster than a traditional workstation network
     implementation.
 
     Dr. Jean-Francois Santucci at EERIE in France is using TI FPGAs
     in his resarch into testibility issues.  As part of his effort
     Dr. Santucci is writing a book called Testability Issues in FPGA
     Based Microelectronic Systems.  Dr. Santucci efforts are being
     support from TIs Europrean FPGA group located in Nice, France.
 
     Dr. Andrea Rucinski and Dr. Frank Hludik, University of New
     Hampshire, have just selected TIs TPC1225 device for a
     satellite project funded by NASA that they and their students
     will be building over the next two years.  In this project TI
     FPGAs will be used to implement such digital modules as a
     watchdog controller, DMA controller, event message module,
     spectrum accumulator and automatic digital gain control.
     More details will follow in the 1Q95 issue.
 
     To focus on their strategic product
     areas, Actel Corporation and TI
     extended their seven-year relationship with changes in how they serve
     the market for antifuse field-programmable gate arrays (FPGAs).  Actel
     announced it will expand its market presence by purchasing the antifuse
     FPGA business of TI.  TI will no longer market FPGAs, and will increase
     the volume of FPGA manufacturing it does for Actel.
 
For more information, contact:

Jeffrey Gueller
jjg1@msg.ti.com
TEL:  (214) 997-5450
FAX:    (214) 997-5650

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