MICROELECTRONIC SYSTEMS NEWS



FILENUMBER: 502
BEGIN_KEYWORDS
Mentor Graphics Design Kit for MOSIS
END_KEYWORDS
DATE: january 1996
TITLE: Mentor Graphics Design Kit for MOSIS



Mentor Graphics Design Kit for MOSIS

(Contributed by Sue Drouin of Mentor Graphics)

The Mentor Design Kit for  MOSIS  updates  the  technology  files
created  two  years  ago  and adds pads to generate pad frames, a
cell library  and  documentation.   Tim  Heldt  of  Oregon  State
University  (formerly  at  Washington  State  University) was the
developer of this kit which is available for academic purposes to
all  universities  that  are  current  participants of the Mentor
Graphics Higher Education Program and have signed the Higher Edu-
cation Program License Agreement.

Contents of the kit for IC Station (V8, A.4) and GDT Designer in-
clude:

    Supported technologies:  MOSIS SCMOS Foundries (Technology Files)     
						     Orbit's 2.0um n-well , double poly process 
                             Orbit's 1.2um n-well, double poly process
                             HP's 1.2um CMOS34/AMOSI process
                             HP's 0.8um CMOS26G process
                             HP's 0.6um CMOS14TB process


    Pads:   MOSIS Pad Cells to build Padframes (example padframe included)
         
                 scn12-pads              SCMOS 1.2u, n-well pads
                 scn20-pads              SCMOS 2.0u, n-well pads


    Standard Cells:  202 cells for 2.0u and 1.2u
                     2,3,4 input and, nand, or, nor, ao, aoi, oa, oai,
                     tribuf, dff, dffS, dffR, dffSR, xor, xnor, inv, latch,
                     latchS, latchR, latchSR, mux, buf

                     Databook,including full details on each cell, is available
                     for 2.0u.   Databook for 1.2u is in progress.

                     NOTE: Standard cells for 0.8u and 0.6u are not currently
                     available


    Tools supported:
                     Autologic II
                     Design Architect
                     Quicksim II
                     IC Station
                     IC Blocks
                     IC Verify
                     Led
                     Lsim
                     AutoCells
                 

    Documentation:  Instructions on installation/setup
                    Top-down design example for IC Station (V8, A.4)
                    Top-down design example for GDT Designer


    NOTE:  Documentation is available in Frame and Postscript format.
           Documentation revisions will be reviewed quarterly.
           

For more information about the Mentor Graphics Higher Education Program, 
access:

   WWW

or contact:

Sue Drouin
Higher Education Program
Mentor Graphics
8005 SW Boeckman Road
Wilsonville, OR 97070
TEL: (503)-685-1183
FAX: (503)-685-7989
EMAIL: sue_drouin@mentorg.com

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