MICROELECTRONIC SYSTEMS NEWS



FILENUMBER: 522
BEGIN_KEYWORDS
SEMATECH 0.25-Micron Design
END_KEYWORDS
DATE: september 1996
TITLE: SEMATECH Prepares for 0.25-Micron Design


SEMATECH Prepares for 0.25-Micron Design

(Adapted from SEMATECH and Synopsys WWW Press Releases)

In a major effort to bring electronic design automation (EDA)  up
to  speed  with  the  semiconductor  industry's  agreesive  deep-
submicron roadmap, SEMATECH has launched an  initiative  to  fund
research  and development for the EDA software needed for a 0.25-
micron design capability by 1998 and get ready for the  following
0.18-micron generation.  The ECAD Program focuses specifically on
timing driven front-end and  physical  design  as  an  integrated
closed loop process, with emphasis on doing early concurrent tim-
ing (performance) driven design. It includes the necessary  accu-
rate parasitic extraction of chip interconnect performance.

SEMATECH has selected the industrial team of  Synopsys,  IBM  and
Cooper  and  Chyan  Technology  (CCT) to develop tools capable of
designing chips with 10 million usable gates or better.  In  May,
Synopsys announced a 9.9 percent investment stake in CCT. The IBM
research and development project,  the  CCT  investment  and  the
SEMATECH  contract  are part of Synopsys' approximately $100 mil-
lion effort toward solving the quarter-micron design problem.

For additional information, access:

Sematech WWW

Synopsys WWW



 

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