MICROELECTRONIC SYSTEMS NEWS
FILENUMBER: 8017
BEGIN_KEYWORDS
SoftSmiths Design VHDL State Machine Design
END_KEYWORDS
DATE: november 1994
TITLE: SoftSmiths Design Entry Tools
SoftSmiths Design Entry Tools
(Contributed by Don Troxel of M.I.T.)
********************************************************************
* *
* VHDL & State Machine Design Entry *
* X11 based Design Entry Tools from SoftSmiths *
* *
********************************************************************
Overview
--------
schematiX11-VHDL is an optional package to the general purpose
schematiX11 design entry and schematic capture tools. The VHDL options
allow three tasks to be performed:
1. Graphical capture of state machines and automatic generation
of synthesizable VHDL code from the state machine diagram.
2. VHDL Behavioral Definition of functional blocks.
3. Hierarchical graphical capture of the interconnect of these
functional blocks and/or predefined library elements and
automatic generation of VHDL structural netlists.
Finite State Machine Generation
-------------------------------
For symbol blocks that can be defined as a state machine
schematiX11-VHDL offers a powerful tool for the graphical capture of
state machines, either mealy or moore. The state machine is defined in
a flow chart style using state, conditional test and signal assert
symbols.
schematiX11 can then produce VHDL code that matches the
functionality of the graphical state machine. This VHDL code is
compatible with most known synthesizers.
Note: Besides VHDL other formats include espresso/mis truth table
format and behavioral C code compatible with Softsmiths C based funsim
simulator.
Behavioral VHDL - The VHDL Tool
-------------------------------
Using graphical design entry the user may design high level
VHDL blocks by defining symbols and entering VHDL code for their
functional description.
schematiX11-VHDL provides rapid access to the functional code
description for each block through the VHDL Tool facility. By simply
clicking on the block, schematiX11 finds and opens the appropriate
entity, architecture and configuration files using the editor of your
choice.
Being in a graphical form it is much simpler to transfer the design
concepts to other colleagues and the VHDL Tool allows direct browsing
of the functional code for any block at any level in the hierarchy.
VHDL Structural Netlists
------------------------
Whether symbols are created with the VHDL Tool, with the State Machine
tool or come from a predefined library these symbols may be
graphically interconnected including hierarchical compositions of
symbols using the general schematic features of the schematiX11
product.
Facilities exist via the properties mechanism to set and modify VHDL
generic values and to set and modify port types.
VHDL code representing the structural interconnect of these designs
may be automatically generated.
The result is a collection of VHDL files that either define the
structural interconnect or define the behavior of the leaf level
blocks of the hierarchy.
Licences
--------
schematiX11-VHDL is available under very cost effective site licences
that allow UNIX based productivity at prices per user comparable
to PC based products.
schematiX11 runs on Sun Workstations and/or attached X terminals.
For more information please contact info@softsmiths.oz.au
Other options available include schematiX11-FPGA, schematiX11-spice,
schematiX11-ASIC and schematiX11-C
Evaluations
-----------
SoftSmiths supplies evaluation software for all of its CAD products.
Just ask my sending email with FULL mailing address to
info@softsmiths.oz.au and specify which tape media
Sun Cartridge or Exabyte tape is preferred.
----------------------------------------------------------------------
Information Request info@softsmiths.oz.au
SoftSmiths Pty. Ltd. Ph: +61 7 847 2990
54 Wylma St Fax: +61 7 847 2707
Holland Pk 4121
Australia
**********************************************************************
* *
* schematiX11 *
* X11 based Design Entry Tools from SoftSmiths *
* *
**********************************************************************
The following is a brief overview of the schematiX11 product
and the options that can be run with it.
schematiX11
- a general purpose X11 based schematic editor;
- symbol placement and wiring
- deletion, moving and copying of wires and symbols
- region moving, copying and deletion;
- provides cut and paste and file import capabilities;
- user definable properties on each symbol/instance
- supports buses and bus taps with variable offsets
- full hierarchical support with unlimited depth
- tear off menus provide rapid access to symbol selection
- multipage flat capability with unlimited pages
- user extensible netlisting capability;
- optional snap to port wiring
- choice of manhattan or non-manhattan wiring
- all menu commands may be key bound for rapid access
- a script driven grapical symbol editor (symgen)
- provides push-pop hierarchical features including automatic
symbol generation from scripts in top-down mode and symbol
generation from implementation in bottom up mode
- provides scaled postscript generation in either portrait or
landscape modes and in A4 or US letter sizes.
- comprehensive on-line help with hper-links and search capability
- direct netlist output in proprietary definecell, VHDL, SPICE,
Xilinx XNF, and an open user definable capability.
***********************************************************************
* *
* schematiX11 is bundled with various options, libraries and *
* capabilities to target different market segments. *
* *
***********************************************************************
schematiX11-spice:
- allows the schematic capture of spice elements, transistors,
passive elements, subckts and macros;
- has a user extensible netlisting capability, so users
can add their own elements or subckts to the symbol library
and provide spice circuit netlists for same;
- controls spice file creation (includes models and commands)
and submitting to PSPICE, HSPICE and /or Berkeley Spice;
- waveform viewing with the X11 based viewsof package
- automatic data extraction and checking with the querysof
tool - allows for results to be extracted and reported
- users may add their own symbols, devices and models
schematiX11-ASIC:
For design entry of ASIC library elements, generation of ASIC
netlists and optional high accuracy timing simulation.
Allows the user to create hierachical logic designs down to the
gate level. A generic unit delay gate level library is provided
this may be automatically "mapped" to vendor specific ASIC libraries.
Vendor specific libraries allow load and slew rate
dependent timing models to be accurately simulated with the
C based simulator, Funsim.
The option can be used to develop designs for standard ASIC
vendors (e.g. Fujitsu, LSI) or it may be used by design groups
and foundries that have their own cell libraries and need an
inexpensive schematic capture package for either in-house use
or to supply their customers.
schematiX11-Xilinx
For design entry of Xilinx 2000, 3000 and 4000 series FGPA
designs, generation of XNF netlists and gate level
simulation.
Very similar to the -ASIC option except that the library is
of Xilinx parts and the simulation is pre-layout unit-delay.
schematiX11-C:
This option can be considered a low-cost alternative to VHDL
or verilog behavioral simulators. A user may develop designs
by defining the function of blocks in a C based language to
run on the Funsim simulator.
- uses schematiX11 to provide the structural connectivity and
to provide overall control of the design entry process;
- uses the C language capabilities of SoftSmiths funsim
simulator to provide for simple low cost behavioral and
structural simulation of designs including test beds and
complete systems;
- optionally uses the equation tool to automatically generate
C code from a logic equations language
schematiX11-VHDL:
- provides hierarchical schematic capture and design entry as
a front-end to VHDL simulation;
- uses schematiX11 to provide VHDL structural netlists;
- optionally uses the equation tool to automatically create
VHDL code from an equations language;
(Note a VHDL simulator is not included in the package,
SoftSmiths do OEM VHDL simulators)
schematiX11-State Machine
The latest addition to the schematiX11 tool suite is a
graphical state machine capability. Users define
a state machine using a flow-chart style of state boxes,
condition tests and signal asserts.
- State Machines are caught graphically
- VHDL code is generated automatically from the State Machine
for simulation and synthesis.
- Funsim C code is generated ayutomatically for simulation
- A transition table compatible with espresso is generated
and may be used to feed synthesis tools.
XNF, HSPICE and PSPICE are trademarks of Xilinx Inc, Metasoft and
Microsim Corp. respectvely
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About SoftSmiths
*********************************************************************
SoftSmiths is an Australian CAD company supplying computer
aided design tools and VLSI technologies. SoftSmiths was incorporated
in July 1992 and was initially formed to commercialize the CAD software
assets
of Austek Microsystems a VLSI design company.
SoftSmiths initial competitive advantage comes from its ability to
leverage 8 years of VLSI software R&D at Austek Microsystems Pty. Ltd.
making it a price/performance leader in its market.
The software has a proven foundation based on the successful
development
and commercialisation of major full-custom VLSI integrated circuit designs
at Austek Microsystems.
schematiX11 has been developed entirely at SoftSmiths, as a result of
customer feedback and perceived market need for a lower cost UNIX
based solution for design entry.
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University Licence Conditions
*********************************************************************
Licence is granted for educational purposes only, for undergraduate
teaching
and postgraduate research.
Up to 10 nodes on a net may be licensed. Each node may have multiple
users.
All machines must be owned by the Department of the
University/Institution.
No license is granted for commercial activities. Such usage will void
your licence.
Licences are perpetual - provided licence conditions are not breached
There is a shipping and handling fee of $US200. Upgrades, expected
once per year under this program, will require an additional handling
fee. So if you have 100 students thats about $2/student/year.
While we welcome feedback, bug-reports and questions this program does
not guarantee technical support.
Hardcopy documentation is not provided. Extensive hyper-linked on-line
documentation exists as well as postscript versions of tutorials.
Postscript may be printed and copied.
Countries with poor software piracy and intellectual property
protection laws may be excluded from this program.
********************************************************************
Platforms
********************************************************************
Software is delivered for SPARC based work-stations ONLY. Software
will work under Sunos 4.1.x and Solarix 2.x (if running binary
compatibility mode). Software will operate between such a Sun
workstation and any X terminal and any machine on the net.
*******************************************************************
How to Participate
*******************************************************************
1. Ensure that you are representing your Department.
2. Tell us (email preferred) what you plan to do with the software and how
it
will be used in your institution.
3. Send a Purchase Order to SoftSmiths at the address/fax below
Purchase order should state
1 SchematiX11 Univesity License $ 0
2 Handling & Shipping Fee $A270
4. Order should state the hostid's of the Sun machines
to be licensed. You may list up to 10 machines
on your network.
5. Send a check with your purchase order. Check may
be a draft bank check in Australian dollars or it
may be the equivalent in your currency drawn on
your local bank. If the latter please add $10 for
check clearance fees. Or if you prefer it payment may
be wired.
6. SoftSmiths will send you a tape, a licence agreement, invoice and a
temporary licence key for your machines. On receipt of a signed
license agreement, SoftSmiths will issue a more permanent licence
key.
The licence agreement is fairly standard, the only unusual feature
is restricting the Licensee to use for educational purposes only
and forfeiture of licence if this condition is not maintained.
At this point if for some reason you do not wish to proceed with
the University Program then on return of all items SoftSmiths will
refund any payment made.
7. Besides shipping and administration costs the Handling fee is meant
to cover a degree of technical support, especially in the early
start up phase.
dbouldin@utk.edu
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