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1997 VHDL International Outstanding Dissertation Award
The purpose of this award is to recognize the outstanding doc-
toral dissertation which best advances the state of the art in
hardware description language-based electronic design automation.
Prize:
The outstanding dissertation award recognizes significant
research with high impact to the electronic design automation
community. Publication of significant results or the entire
monograph is being pursued with IEEE/ACM technical journals and
publishers. The details for a prize are also being finalized.
The award will be presented at the Fall VHDL International Users
Forum (VIUF) in Washington, D.C. October 19-22, 1997.
Qualifications:
The dissertation must have been completed (successfully defended)
between June 1 of the previous year until June 1 of the year of
the award. For this, the first year of the award, submission of
dissertations dating from June 1, 1995 until June 1, 1997 will be
accepted.
Criteria:
Each dissertation will be evaluated based on its relevance to
HDL-based electronic design automation, impact on present and fu-
ture electronic design, practical and theoretic contributions to
the state of the art, and quality of presentation.
Evaluation process:
Graduating students (or their advisors) who wish to have their
dissertation considered for the best dissertation award must sub-
mit an electronic (ASCII) copy of the title, an extended abstract
of no more than five pages, date of completion, and the authors
name to gdp@vhdl.org by 1 August. The extended abstract should
include a discussion of its focus, the results, and how it meets
the criteria listed above. The authors of the top three
abstracts will then be invited to submit their full dissertation
to the evaluation committee for evaluation. Each will also be in-
vited to present their results as a part of the program for the
Fall VIUF conference. The abstract evaluations should be com-
pleted by 15 September 1997.
Some topics of interest may include, but are not limited to the
following:
simulation
synthesis technology
formal techniques
modeling methodologies
analysis techniques
EDA tools
language issues/extensions
analog/mixed signal
intellectual property
hardware/software codesign
multidisciplinary design
verification and validation
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FILENUMBER: 9602
BEGIN_KEYWORDS
VHDL Dissertation Award
END_KEYWORDS
DATE: july 1997
TITLE: 1997 VHDL International Outstanding Dissertation Award
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