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In cooperation with SGS-Thomson Microelectronics, CMP is introducing a
high performance deep submicron .25 CMOS process from SGS-Thomson (Crolles).
The HCMOS7 process has the following features:
Gate length (0.25 drawn, 0.2 effective).
Shallow trench isolation process.
Up to 6 levels metal layers with fully stackable contacts and vias.
Power supply: 2.5 V.
Threshold voltage: VTN 0.5 V, VTP - 0.5 V.
Ion : TN @ 2.5 V : 600 A/m
Ion : TP@ 2.5 V : 300 A/m
Design kits are supported under Cadence, Synopsys and Eldo.
Full custom designs are supported using Virtuoso layout editor and LAS
synthesizer. The layout verifications (DRC, ERC, extraction, LVS) are
fully supported for Diva and Dracula. Transistor-level simulations are
only supported under Eldo Level 59.
Standard-cell designs are supported using Verilog/VHDL descriptions for
synthesis and simulation. Synthesis is supported under Synergy or Synopsys.
Simulation is supported under Verilog-XL, Leapfrog and VSS. The automatic
place & route is supported under Cell3.
The current supported CAD software versions are:
Cadence/OPUS version 4.3.4.50.106
Cadence/Dracula version 4.3.0996
Eldo version 4.4.1
This process is available for prototyping to Education Institutions
and Research Laboratories, on a cooperation basis.
No commercial designs are accepted at this early stage.
It is expected that later on, the process will be available on a
commercial basis for small volume production to Education Institutions,
Research Laboratories and specified Companies. A .18 process would
then be made available for Education and Research.
The cost for prototyping is 3.000 FF/mm2 (5 packaged circuits,
at least 10 unpackaged circuits). The first run will take
place on June 22nd, 1998. It is expected that
micromachining options will be offered later as well.
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CMP is a broker for a number of technologies (prototyping and
low volume production).
Integrated circuits
0.7 CMOS DLM from ATMEL-ES2
1.2, 0.8, 0.6, CMOS DLP/DLM from AMS
1.2, 0.8, BiCMOS DLP/DLM from AMS
0.6 GaAs MESFET from VITESSE (0.4 starting Q2 1998)
0.2 GaAs HEMT from PHILIPS (up to 90 Ghz)
Micromachining
1.2 CMOS DLP/DLM from AMS, compatible front-side bulk micromachining
0.2 GaAs HEMT from PHILIPS, compatible front-side bulk micromachining
Diffractive Optical Elements (DOE) from CSEM
Design kits are available for MENTOR GRAPHICS and CADENCE.
CAD software:
CADENCE, COMPASS, MENTOR GRAPHICS, VIEWLOGIC, TANNER,... .
MCM and 3D packaging
MCM-L from BULL, Les Clayes-Sous-Bois, France.
MCM-C from DASSAULT ELECTRONIQUE, Saint Quentin en Yvelines, France.
MCM-C/HTCC from Montpellier Technologies-IBM, Montpellier, France.
MCM-D from Thomson-CSF MicroElectronique, Massy, France.
MCM-V (3-D packaging) from 3D-Plus, Buc, France.
Design kits: available for most of the processes from:
ALLIANCE DOLPHIN MAGIC MENTOR GRAPHICS
CADENCE EXEMPLAR MDS SYNOPSYS
COMPASS TANNER VIEWLOGIC
Since 1981, about 220 Institutions from 39 countries have been served,
more than 2 100 projects have been prototyped through 230 runs, and
more than 20 different technologies have been interfaced.
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FILENUMBER: 9813
BEGIN_KEYWORDS
0.25-MICRON CMOS CMP
END_KEYWORDS
DATE: April 1998
TITLE: CMP INTRODUCES 0.25-MICRON CMOS
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