MICROELECTRONIC SYSTEMS NEWS



FILENUMBER: 9826
BEGIN_KEYWORDS
VITESSE GAAS MOSIS
END_KEYWORDS
DATE: July 1998
TITLE: POSSIBLE END TO VITESSE GAAS RUNS VIA MOSIS

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TITLE: POSSIBLE END TO VITESSE GAAS RUNS VIA MOSIS

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From XMOSIS@mosis-chip.isi.edu Fri Jul 24 19:11 EDT 1998
Subject: Possible end to Vitesse H GaAs 4 runs through MOSIS

MOSIS is considering canceling all planned Vitesse H GaAs4 runs
(including the rescheduled August run) because of lack of submissions.
Without an expectation of submissions sufficient to fill future runs,
we cannot continue to offer this technology. We need your feedback on
this process.  At a minimum, please provide estimates of the number of
projects, submission dates and their sizes.

Thank you for your time and consideration.  Please respond by sending
a message to support@mosis.org.  We would like to receive all
responses by July 31.  If you are unable to provide a response by that
date please send it at your earliest convenience.

Regards,
The MOSIS Service

Phone: (310) 822-1511 x403, Fax: (310) 823-5624
USC/ISI, 4676 Admiralty Way, Marina del Rey, CA 90292
URL: MOSIS


--- H GaAs 4 process info

The Vitesse H GaAs 4 process is optimized for high-speed VLSI designs
which makes it suitable for many applications typically implemented in
CMOS. Layout rules and HSPICE models are available.

H GaAs 4 is a scaled version (0.4 um) of the 0.6 micron H-GaAs 3. The
process supports DCFL for VLSI designs (speeds up to 800 MHz) and SCFL
for MSI parts (up to 10 GHz). Please note that H GaAs 3 designs
(including the MSM option) cannot be fabricated in H GaAs 4.

The three principal enhancements of H GaAs 4 over H GaAs 3 are:

  1) Reduced interconnect pitch

  The reduced interconnect pitch provides for smaller circuits with less
  wire loading.  New design rules eliminate "dog bones" in metal/metal
  connections and result in metal 1 and metal 2 contacted pitches of
  2.4 microns, reduced from 4.6 in H GaAs 3.

  2) MESFET Enhancements

  The modifications in the H GaAs 4 transistors include smaller FETs,
  shallower channels and lower threshold voltages.  This results in
  devices with higher gain and higher operating frequency and also
  greatly reduces short channel effects.

  3) Substrate Contacts and Isolation Rings

  The substrate contacts provide a means for accurately setting the
  substrate to a fixed voltage.  Isolation rings allow different areas
  of the circuit to be biased at different voltages.  The fixed
  substrate voltage facilitates the design of analog and mixed mode
  circuits and provides for much more accurate SPICE simulations over a
  wide range of operating conditions.


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