MICROELECTRONIC SYSTEMS NEWS

FILENUMBER: 9851 BEGIN_KEYWORDS CURRENT_MIRROR END_KEYWORDS DATE: December 1998 TITLE: TUNABLE CMOS CURRENT MIRROR DESIGN
=================================================================
TITLE:  TUNABLE CMOS CURRENT MIRROR DESIGN

Recently we have come up with a new current mirror topology which
might be interesting for you. It will appear during the next year
in the IEEE Trans. on Circuits and Systems, Part I. If you  wish,
you may already download it from SCM.PS.GZ (192K).

"Very  Wide  Range  Tunable  CMOS/Bipolar  Current  Mirrors  with 
Voltage Clamped Input"


ABSTRACT:

In low power current mode signal processing circuits it  is  many
times   required   to   use  current  mirrors  to  replicate  and
amplify/attenuate current signals, and to clamp  the  voltage  of
nodes  with  high  parasitic  capacitances  so  that the smallest
currents do not introduce unacceptable delays. The use of tunable
active-input  current  mirrors  would  meet both requirements. In
conventional active input current mirrors stability  compensation
is  required.  Furthermore, once stabilized, input current cannot
be made arbitrarily small. In this paper  we  introduce  two  new
active-input  current  mirrors  that  clamp their input node to a
given voltage. One of them does not require  compensation,  while
the  other  may  require  under  some circumstances, but for both
input current may take any value. The mirrors  can  operate  with
their  transistors  biased in strong inversion, weak inversion or
even as CMOS compatible lateral bipolar  devices.  If  biased  in
weak  inversion  or  as lateral bipolars, the current mirror gain
can  be  tuned  over  a  very  wide  range.  According   to   the
experimental  measurements  provided in this paper, input current
may spawn beyond nine decades, and current  mirror  gain  can  be
tuned  over  11  decades.  As an application example a sinusoidal
gm-C based VCO has been fabricated  whose  oscillation  frequency
could be tuned for over 7 decades between 74mHz and 1MHz.


Bernabe Linares-Barranco, PhD
Senior Researcher (Colaborador Cientifico) CSIC
Instituto Microelectronica Sevilla (IMSE)
National Microelectronics Center, CNM-CSIC
Ed. CICA, Av. Reina Mercedes s/n
41012 Sevilla, SPAIN
Phone: 34-95-4239923   *** NEW AREA CODE ***
Fax: 34-95-4231832   *** NEW AREA CODE ***
E-mail: bernabe@imse.cnm.es
URL: http://www.imse.cnm.es/~bernabe


================================================================= 


Return to MSN Home Page

dbouldin@utk.edu