MICROELECTRONIC SYSTEMS NEWS

FILENUMBER: 9926 BEGIN_KEYWORDS MOSIS TOOLS LIBRARIES END_KEYWORDS DATE: July 2000 TITLE: MOSIS-COMPATIBLE DESIGN TOOLS AND LIBRARIES
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TITLE: MOSIS-COMPATIBLE DESIGN TOOLS AND LIBRARIES

(Adapted from www.mosis.org)

Commercial tools and libraries  which  can  be  used  to  for  IC
designs submitted to MOSIS include:

* Artisan Components  offers  free  standard  cell  libraries  to
commercial  firms for the TSMC 0.25 micron process. MOSIS is part
of the Artisan ServiceNet program. These libraries work with  the
Cadence and Synopsys tools.  Also 0.18 micron.

* Avant! offers digital design libraries for the TSMC 0.35 micron
and TSMC 0.25 micron processes.  Also 0.18 micron.

* Cadence tools for full-custom CMOS  design  can  use  the  NCSU
Cadence  Design  Kit.   MOSIS  supports,  on a best effort basis,
technology files for SCMOS and vendor rules (starting with design
kits   for  the  Agilent/HP  0.5  micron  and  TSMC  0.35  micron
processes).  Also 0.25 micron (design kit).

* IC Editors provides IC Layout & Verification Software for  PCs.
DRC and LVS files have been contributed.

* LEDA Systems has developed digital  design  libraries  for  the
TSMC  0.35  micron  and TSMC 0.25 micron processes. Analog and RF
cells are also available. The  digital  std  cell  libraries  are
available through MOSIS for $5000 for commercial customers and at
no charge to universities.

* Mentor Graphics supports a SCMOS design kit. For information on
this  part  of their Higher Education Program,see the ASIC Design
Kit. Mississippi State  University  has  a  SCMOS  Standard  Cell
Library  for  the  Mentor  tools  with  front  end interfaces for
Mentor/SCS, and Synopsys.

* Synopsys tools are supported within the  design  kits  for  the
Agilent/HP  0.5  micron,  TSMC  0.35  micron and TSMC 0.25 micron
processes.

* Tanner EDA offers IC and MEMS design tools that run on PCs  and
Unix workstations. All processes accessed by MOSIS are compatible
with their  family  of  tools.  Tanner  CES  also  offers  design
services.  L-edit  process  technology  setups are available from
Tanner. SCMOS libraries from Tanner  include  low-power,  digital
standard  cells  in  layout  form (CIF and GDS) for both the TSMC
0.25 and 0.35 micron processes as well as the  AMI  0.50  and  HP
0.50 micron processes.


Non-commercial tools include:

* Ballistic is an analog layout language that has been  developed
at the University of Toronto as part of a larger research project
involving analog module generators. BALLISTIC requires  GDT,  but
is otherwise free to all non-profit organizations.

* The Electric VLSI Design System is a complete Electronic Design
Automation  (EDA) system. The Electric source code has been given
to the Free Software Foundation.  Technologies  files  for  MOSIS
technologies are part of the default installation.

* LASI is a PC-based layout system developed at the University of
Idaho. The associated textbook is CMOS Circuit Design, Layout and
Simulation. LASI is available in DOS and Windows versions.

* Magic is a popular integrated circuit layout tool in common use
in  universities  and  a  number of industrial sites. Magic comes
with source code and a  relaxed  copyright  that  allows  you  to
redistribute  it,  modify it, and generally do what you want with
it.

The MOSIS document
server provides a path to download not only vendor rules and
SPICE models, but also technology files and design kits.


Vendor Rules

For additional information, access:
WWW

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