MICROELECTRONIC SYSTEMS NEWS

FILENUMBER: 9946 BEGIN_KEYWORDS ASIC EMULATION FPGAS END_KEYWORDS DATE: December 2000 TITLE: ASIC EMULATION USING FPGAS
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TITLE: ASIC EMULATION USING FPGAS

SpeedGate Inc. is an Austin, Texas based 
EDA company targeting the well publicized "ASIC verification 
bottleneck". The company's first product, the FPGA Stuffer provides an 
environment for developing ASIC emulation prototypes using 
off the shelf FPGAs interconnected via custom or re-configurable
printed circuit boards.  This methodology is commonly referred 
to as "roll your own" or Open System Emulation.

The FPGA Stuffer addresses primary bottlenecks that have kept 
emulation/prototyping from becoming main stream verification 
technology: 

  - The difficulty of partitioning the design between multiple 
    FPGAs. 
  - The difficulty of observing all signals internal to the FPGA 
    for debug purposes. 
  - The lack of an environment providing a controlled process 
    flow and readily available project database. 

The FPGA Stuffer solves these issues at the RTL level. The 
software has been through an extensive 9 month Beta program on 
high gate count production emulation projects including a 12M 
ASIC gate design partitioned between 60 Virtex FPGAs. The FPGA 
Stuffer is compatible with FPGA Compiler II, Design Compiler, 
Exemplar and Synplicity.  The software is available on a monthly 
subscription or perpetual license basis.

For additional information, contact:

SpeedGate Inc.
3925 Braker Lane
Austin, Texas 78759
512/305-0630 Office
512/305-0009 Fax
512/657-7054 Cellular
howard@speedgateinc.com

SPEEDGATE WWW.

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