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TITLE: THE QUALITY OF SYNTHESIZED ASICS
One measure of the quality of computer-aided design tools is to
compare the speed of the resulting IC to that of a functionally
equivalent design that has been performed manually. Researchers
at the University of California, Berkeley, have reported that
synthesized ASICs often lag their custom counterparts by a factor
of 8 in speed. The authors attribute this difference to the way
human designers often devise a superior pipelined architecture
and minimize the levels of logic between clock ticks. Human
designers frequently excell at reducing wire lengths by carefully
placing connected modules near one another using floorplanning.
Clever sizing of transistors and wires and implementing critical
paths with dynamic logic also contribute to attaining higher
speeds through custom design. Furthermore, the human designer
may operate with less margin for process variations than
synthesis does with its pre-constructed library cells. Recent
advances in synthesis techniques which utilize pipelining and
better libraries are narrowing this gap from a factor of 8 to
only a factor of 2.3 in some cases. For more information, consult
the full paper: D. Chinnery and K. Keutzer, "Closing the Gap
Between ASIC and Custom: An ASIC Perspective", Proc. of the 2000
Design Automation Conference, pp. 637-643, June, 2000. It is
available on-line at:
DAC-2000
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FILENUMBER: 9988
BEGIN_KEYWORDS
QUALITY SYNTHESIZED ASICS
END_KEYWORDS
DATE: April 2001
TITLE: THE QUALITY OF SYNTHESIZED ASICS
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