ECE 551 - System-on-Chip Design
| Description: This course provides background and hands-on experience with top-down VLSI design flows where custom design techniques are married with HDL synthesis to produce complex digital systems. Topics covered include HDL coding techniques for system-on-chip (SOC) design, standard cell library development and use, synthesis techniques, algorithms for placement and routing, floorplanning, FPGA-based design and prototyping, timing analysis, and power-aware design techniques. Students will gain experience applying top-down VLSI design techniques in the implementation of SOCs, FPGA-based implementations and advanced microprocessors.
Dr. Garrett S. Rose
Office: Min Kao 308
P. Chu, RTL Hardware Design Using VHDL: Coding for Efficiency, Portability, and Scalability, Wiley-Interscience, 2006. (ISBN: 978-0-471-72092-8)
Lectures: TR 9:40am - 10:55am, MK406