ECE255 Intro. to Logic Design, Fall 2011

Here's a pdf file of the syllabus. syl255F11.pdf

The following files can be copied when needed for the labs. They will be explained in class and on the lab handouts.

You don't have to use this file: basys.ucf If you want to use it, you can edit it to define the "User Constraints" in your labs. In any case, it's a handy reference for the FPGA pin connections hardwired on the BASYS board. This *.ucf file lists the FPGA I/O pin connections to LEDs, switches and pushbuttons, 7-segment displays, and the clock (the on-board oscillator) on the BASYS board. If you use this as a User Constraint File, you must delete or comment-out the lines in the file for all pins not explicitly used in your design.

Here're vhdl code and bit files for Lab1. The vhd files are plain text but THE BIT FILE IS NOT PLAIN TEXT. lab1.vhd lab1.bit tblab1.vhd

Here's the vhdl file for Lab3. CDiv.vhd

Here's the vhdl file for Lab4. DeBounce.vhd