DC shell results 1:

****************************************
Report : area
Design : mcore
Version: 2001.08
Date   : Mon May  5 12:00:05 2003
****************************************

Library(s) Used:

    typical (File: /sw/CDS/ARTISAN/TSMC18/aci/sc/synopsys/typical.db)

Number of ports:              378
Number of nets:               372
Number of cells:                2
Number of references:           2

Combinational area:       129626.484375
Noncombinational area:    111830.242188
Net Interconnect area:     151.068527  

Total cell area:          241456.718750
Total area:               241607.781250

Information: This design contains black box (unknown) components. (RPT-8)
1
current_design leon
Current design is 'leon'.
{"leon"}



****************************************
Report : area
Design : leon
Version: 2001.08
Date   : Mon May  5 12:02:00 2003
****************************************

Library(s) Used:

    typical (File: /sw/CDS/ARTISAN/TSMC18/aci/sc/synopsys/typical.db)

Number of ports:              120
Number of nets:               199
Number of cells:               75
Number of references:           4

Combinational area:       129766.195312
Noncombinational area:    113064.335938
Net Interconnect area:     152.568771  

Total cell area:          242830.531250
Total area:               242983.093750

Information: This design contains black box (unknown) components. (RPT-8)
1

============================================================================


Timing Path Groups:
-------------------
                                                          Required  Esti
mated 
                                                          Delay     Dela
y     
From                         To                           (ns)      (ns)
      
........................................................................
..
(I)                          (O)                             n/a       n
/a    
(I)                          (RC,N_clk)                   100.00      5.
17    
(RC,N_clk)                   (O)                          100.00     10.
08    
(RC,N_clk)                   (RC,N_clk)                   100.00     41.
52    
(RC,N_clk)                   (FC,N_clk)                    50.00     15.
44    
(FC,N_clk)                   (RC,N_clk)                    50.00      9.
56    

#export_chip
exec rm -rf $export_dir
exec mkdir -p $export_dir
export_chip -progress -dir $export_dir
Saving current chip for export...done.
Exporting chip to `export_dir'...
Export leon-Optimized to export_dir ...
Done.