Amplify Demo


cp /sw/ampdem/* .

synplicity_tools
amplify&

Setup the project


Select open project -> Existing project and select data_control.prj.
Select npc and click Impl Options.
Set the options as follows: Device, Options, Constraints, Implementation Results, Timing Report, Verilog, Amplify and Netlist Restructure.

Run Synthesis without physical constraints


Select Run->Synthesize from the menu (OR press f8, OR press the large RUN button)

Run the ISE Project Navigator PAR tool


Highlight the current implementation (npc) and click on Options->Xilinx->Start ISE Project Navigator
The tool automatically configures a project file. If your project has been updated since you last ran ISE Project Navigator you will need to update the file to continue by clicking YES on the dialog box.
With Amplify 3.7.1 using ISE Project Navigator versions 7.x and higher, it is neccessary to open the project file that was created by selecting File->Open Project, highlighting data_control.ise and open.
Right click in the Sources in Project window and select add source. Add the data_control.edf file generated in the npc synthesis. Image

Highlight Implement Design under Processes for Current Sources, right-click and select properties.
Select the Map Properties tab and verify that Trim Unconnected Signals is enabled
In the Place & Route Properties tab, set the Place & Route effort Level (Overall) to Normal
Verify that User Timing Contraints is selected.
In the Post-Place & Route Static Timing Report Properties set the Timing Report (Number of Items) to 100
Click OK to save the settings.

Highlight Implement Design in the Processes for Current Source, right-click and select run.

Verify the Placement and Routing


Expand Implement Design -> Place & Route, double click on Place & Route Report to view the report.
Right-click Generate Post-Place & Route Static Timing and select run to generate the timing report .
View the timing report and find the start and end points for the worst path.

If there is no worst path indicated, go back to the Amplify window and edit the data_control.sdc constraint file setting the clock constraint to a higher value.

Start a new implementation WITH physical constraints


In the Amplify Project view, click on the New Impl button
Change the implementation name (under Implementation Results) to pc. Click OK to save the changes
Select File->New --> Physical Constraint File. Check Add to Project. Enter the name amplify and check the file location.
Click OK and select NO for the estimation file dialog box.

Create a Region for Critical Paths


Right click in the regions view and select Add-> Block Region and left click and drag from the upper left CLB at (20,29) to the lower-right CLB at (29,0)
This creates a CLB region of 30x10. Image

Right click in the RTL view and select FIND.
Type in the start and end points of the critical paths discovered in the Timing Analyzer.
Click close when done. Notice the critical paths are highlighted in the RTL view. Select HDL Analyst -> Filter Schematic
Right click in the RTL view and select Expand Paths
Right Click and select All Schematic -> Instances
Right Click and select Assign to -> rgn1

Run Estimate Regions


Click on Block Regions in the Physical Tree view.
Right click in the Physical Report View and select Show/Hide columns. Verify that Area, Area Use, Area Use (%) and Name are selected.
Right Click on the device and select Estimate All Regions
Click File -> Save All.

Run Synthesis with Physical Constraints


From the project view, make sure pc is selected. Click on Impl Options to update the implementation options.
Under Amplify, make sure the Physical Constraint Files box is checked and the path points to the amplify.sfp file you created.
Click OK to accept the options and select RUN to synthesize the project.

Rerun the Xilinx Placement and Routing


Repeat Run the ISE Project Navigator PAR tool but select the edf file in the pc directory instead.
Reanalyze the timing results.



These steps can be repeated or modified to physically optimize any design or project.




Prepared by Jonathan Turnmire on November 17th, 2004
Updated March 2, 2006 to correct npl to ise change in ISE Navigator.