Question 4 -- 30 points

The machine on my desk works as follows:

Pages are 4096 bytes.
Pointers are 4 bytes.
Page table entries are also 4 bytes each.
Both user processes and the operating system use virtual memory. The OS has some mechanism (you don't have to care what it is) to reference physical memory so that it can control the VM system. However, its addresses are virtual addresses.
The code section of a user process starts at address 0x1000.
The globals section starts at the first multiple of 4096 past the end of the code segment.
The heap section starts immediately after the globals section and may be increased with the sbrk() system call.
The stack section starts at address 0x7fffffff and grows downward, but typically it is of a fixed size that cannot grow.
The operating system has its own code/global/heap. It begins at address 0x8000000 and grows upward.
The operating system also has its own stack, which starts at address 0xffffffff and grows downward. Like the user's stack it is typically of a fixed size.

Now, for reference, suppose that a user process is running which has a 8000-byte code section, a 20K global/heap section, and a 12K stack. Moreover, suppose that the operating system's code/globals/heap is 20K, and its stack is 12K.

Part 1

Suppose my system employs a single page table for all address translation. The base of this page table is held in a PTBR register. Draw a plausible state of the memory system when the above user process is running. Include protection bits in your drawing when they are relevant. You may assume that everything fits into physical memory. Don't bother with a cache or TLB.

Part 2

Suppose my system employs a two-level paging system for all address translation. The base of the first-level page table is held in a PTBR register. Draw a plausible state of the memory system when the above user process is running.

Part 3

Suppose my system employs four segment tables. These are indexed by they highest two bits in the virtual address, and are accessed by four STBR and STLR registers. For the two segment tables indexed by 01 and 11, the STBR points to the end of the table instead of beginning. Draw a plausible state of the memory system when the above user process is running.

Part 4

For each of the three scenarios, how much memory is taken up by page/segment tables?

Part 5

In each of the three scenarios, discuss exactly what must be done to the virtual memory system when the OS performs a context switch from one process to another. Don't bother with the cache or TLB. You can make qualitative statements about which VM system is better, but it should be obvious to me from your description.

Handy Arithmetic

0x7fffffff / 4096 = 0x7ffff = 524287
0x80000000 / 4096 = 0x80000 = 524288
0xffffffff / 4096 = 0xfffff = 1048575
0x7ffff / 1024 = 511
0x80000 / 1024 = 512

1024 * 512 = 524288
1024 * 1024 = 1048576