ECE 581 Fall 2018

Introducing the UTK Tiny Box Challenge 2018

A coursework competition to build a (very) small DC/DC converter

Deadlines

October 10^th - Competition Begins
October 26^th - Paper Design and Comparison Report Due
November 2^nd - PCB Layout Due Must pass Manufacturer DFM/AFV check as detailed in competition requirements
November 30^th - Testing Report Due

Example Testing Report

Full Competition Requirements

What the Converter Needs to Do

The winning converter will be the one that achieves the highest power density and meeting a list of other specifications

In brief, the other specifications are

Must operate up to 12W output power
Will take in 48Vdc
Must output 1.2 +/- 0.1 Vdc
Must achieve a power density greater than 10 W/in³
Must operate with no load with less than 3W of loss
Must achieve an efficiency greater than 85% (TPE MEthod)
Must have and output voltage ripple less than 2%

Additional Resources

PCB Layout

Interface Board and FPGA Code

Instructions on FPGA coding and Interface Board population

Relevant Literature