DES

 Synthesis  
 
Design compiler
Design compiler is used to synthesize the DES module to get the gate-level netlist.The two important blocks inside the DES i
       Key Scheduler
       Round Function
Design Elaborator
The following figure shows the output of Design Elaborator

Top Module
The following figure shows the Overall schematic of the Topmodule

The following figure shows the Symbolic view of the overall topmodule of DES 

Key Scheduler
The following figure shows the Schematic view of the Key Scheduler of DES 

The following figure shows the Symbolic view of the Key Scheduler of DES .

The following figure shows the Hierarchical view of the Key Scheduler of DES .

Round Function
The following figure shows the Schematic view of the Round Function of DES .

The following figure shows the Symbolic view of the Round Functionof DES .

The following figure shows the Hierarchical view of the Round Function of DES .

Critical path
The following figure shows the critical path in the DES module.

Layout
The following figure shows the Silicon ensemble layout of the DES module.

The following is the floorplan report from Silicon ensemble    

The following figure shows the Final layout.

The following figure shows the Zoomed view.

The following figure shows the Extracted view .

The following figure shows the Log window of Extraction.

The following figure shows the LVS check between the Schematic and Extracted view.

Gate-Level back-annotation Simulation
Once the Layout has been performed , an sdf file corresponding to DES is exported from silicon ensemble. The sdf file and the gate-level netlist are used to do the Post-synthesis simulation
The following figure shows the Post-layout verification window.

The following figure shows the Post-layout Simulation of DES.

Schematic from Netlist
The Gate-level netlist generated from Design Compiler can be used to get the Schematic of the DES module.The netlist has to be imported into ICFB to get the Schematic.
The following figure shows the Schematic of the Top module of DES.

The following figure shows the Zoomed Schematic view of the Top module of DES.

The following figure shows the Symbol of the Top module of DES.

The following figure shows the Schematic view of Key Scheduler of DES.

The following figure shows the Zoomed Schematic of the Key Scheduler of DES

The following figure shows the Symbolic view of the Key Scheduler of DES.

The following figure shows the Schematic view of the Round Function of DES.

The following figure shows the Zoomed Symbolic view of the Round Function of DES.

The following figure shows the Symbolic view of the Round Function of DES.

 

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