A coursework competition to build a (very) small DC/DC converter

• Deadlines

• October 14^th - Competition Begins
• October 30^th - Paper Design and Comparison Report Due
• November 13^nd - PCB Layout Due Must pass Manufacturer DFM/AFV check as detailed in competition requirements
• December 9^th - Testing Report Due
• Example Testing Report

As discussed in lecture 25, you may opt to take a written final exam, rather than completing the experimental portion of the competition. If you choose to do so, requirements on the PCB layout are lessened, and no testing report is needed

• What the Converter Needs to Do

The winning converter will be the one that achieves the highest power density and meeting a list of other specifications

In brief, the other specifications are

• Must operate up to 36W output power
• Will take in 48Vdc
• Must output 12 +/- 0.1 Vdc
• Must achieve a power density greater than 10 W/in³
• Must operate with no load with less than 2W of loss
• Must achieve an efficiency greater than 95% (TPE Method)
• Must have and output voltage ripple less than 1%

• Additional Resources

• PCB Layout
• Altium Starter Project Files
• Additional Information on PCB Layout
• Example Parts Order Spreadsheet
• Interface Board and FPGA Code
• Instructions on FPGA coding and Interface Board population
• Relevant Literature
• Series Capacitor Buck Converter
• Tapped Inductor Buck-derived
• Switched Capacitor and Multilevel Converter
• Multitrack Converter
• Tapped Inductor Buck
• Coupled Inductor Buck
• Switched Tank Converter
• Flying Capacitor Multilevel Converter
• Sigma Converter
• Impedance Control Networks
• Series Stacked Converters