ECE 692: Discrete Time Modeling of Power Electronics
Homework
Homework assignments, Fall 2024. Due dates are posted on the schedule page. All assignments submitted as a pdf through Canvas
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Assignment
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Assignment Additional Materials
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Assignment
- [70 pts] Problem 1
- - Solution
- [30 pts] Problem 2
- - Solution
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Assignment
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Assignment
- [100 pts] Problem 1 Additional Materials
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Assignment
- Homework 8
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Midterm Project Topic Submission [5 pts]
- Submit a brief summary of thedc-dc converter design application, performance specification, and design variables for your intended project by Oct 4, 10:20am
- All 5 points will be awarded for timely submission of a complete set of information
Midterm Project Report [95 pts]- For the specified project topic, generate a paper design which
- -- Meets or exceeds application specifications while achieving optimal or near-optimal pefromance
- -- Selects from specified design parameters intelligently
- -- Is prototype-ready (i.e. is a complete hardware specification for an implementable power stage, excluding control, modulation, and driving circuitry
- -- Is validated independently through separate simulation, confirming principle conclusions on design decisions and performance
- Turn in an IEEE-format report including
- -- Brief statement of the application, performance specification (with per-application justification), and design parameters
- -- Brief technical narrative of the analysis and design approach, leveraging techniques from the class
- -- Full details of the selected design, with justification
- -- Simulation results and discussion of any discrepancies with design prediction
- Report should be written for an audience of your peers in the course; it does not need to be written for a general power electronics audinece outside of the course
- There is no requirement for literature review, but you should motivate the selection of performance specifications, which may be done with a small number of references
- Midterm Project Presentation: [50 pts]
- -- Cover main details of project specification and design goals
- -- Motivate the state of the art in the area
- -- Also prepared for peers in the course
- -- 10-12 min + 3-5 min Q&A
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Final Project Report [100 pts]
- For a converter topology/application of your choosing design a closed-loop digital controller
- -- Regulation should be "agressive" i.e. approaching the limits of feasibility in one or more characteristic of your choosing.
- -- In addition to the below, you must consider in your design at least two nonlinearirites e.g. state-dependent switching, nonlinear controller design, etc.
- -- You must include valid models of analog-to-digital and digital-to-pwm circuitry. This could be done by referencing datasheets of commercial parts. Quantization and delay effects must be included.
- -- You must validate your design through large-signal, time-domain switching simulation, and show direct comparison between small-signal and large-signal performance in response to some disturbance, discussing any discrepancies.
- -- You must employ at least one design technique/approach from a peer-reviewed IEEE paper published fron non-UTK authors which goes beyond the techniques discussed in lectures prior to 11/6.
- Turn in an IEEE-format report including
- -- Brief statement of the application, hardware design, and target performance (both large and small-signal)
- -- Full details of the closed-loop modeling and controller design, with justification
- -- Simulation results and discussion of any discrepancies with design prediction
- -- Simulation results for a test case which reasonably motivates that the design will work in realistic applications
- Report should be written for an audience of your peers in the course; it does not need to be written for a general power electronics audinece outside of the course
- Final Project Presentation [50 pts]
- -- Cover main details of project specification and design goals
- -- Also prepared for peers in the course
- -- 10-12 min + 3-5 min Q&A